| Item |
Standard |
Advanced |
Engineering |
| Max. Layer Counts |
48 |
62 |
62+ |
| Max. Board Thickness (mm) |
4.8 |
6.35 |
6.35+ |
| Min. Core Thickness (mm) |
0.05 |
0.05 |
0.025 |
| Max. Board Size (mm) |
610*660 |
610*720 |
610*720 |
| Trace & Space |
Inner (mm) |
0.075/0.075 |
0.06/0.06 |
0.05/0.05 |
| Outer(mm |
0.09/0.09 |
0.07/0.07 |
0.06/0.06 |
| Registration Budget (mm) |
0.075 |
0.075 |
0.065 |
| Min. Drilled Via Size (mm) |
0.15 |
0.125 |
0.1 |
| Aspect Ratio |
14 |
26 |
33 |
| Copper Weights |
Min Outer (oz) |
1/2 |
1/2 |
1/3 |
| Min Inner (oz) |
1/2 |
1/2 |
1/3 |
| Max Inner (oz) |
1 |
1 |
2 |
| Max Outer (0z) |
2 |
2 |
3 |
| HPL(Hole Plugging Land)=POV(Pad on Via) |
N-CVF |
N-CVF |
N-CVF |
| Via Fill / Cap Plate |
|
& |
& |
| CVF = Conductive Via Fill |
|
CVF |
CVF |
| N-CVF=Non-conductive Via Fill |
|
|
|
| Drill to Copper |
DUT Area (mm) |
0.1 |
0.075 |
0.07 |
| Other Area (mm) |
0.15 |
0.125 |
0.125 |
| Circuit(Plane) to PCB edge (mm) |
0.5 |
0.5 |
0.3 |
| Routing Tolerance (mm) |
±0.2 |
±0.125 |
±0.1 |
| Solder Mask Dam (mm) |
Min 0.125 |
Min 0.125 |
Min 0.1 |
| Blind Mechanical Vias (mm) |
0.15 |
0.125 |
0.1 |
| Buried Mechanical Vias (mm) |
0.15 |
0.125 |
0.1 |
| Laser Drilled Microvias (mm) |
0.125 |
0.125 |
0.1 |
| Mechanical Depth Drilled Vias |
Yes |
Yes |
Yes |
| Back Drill (Pitch) |
0.65 |
0.5 |
0.4 |
| Back Drill Depth Tolerance (mm) |
±0.2 |
±0.15 |
±0.1 |
| Stacked MicroVias |
1+1 |
1+1, 2+2 |
1+1, 2+2 |
Filled Microvias
CVF=Conductive Via Fill
N-CVF=Non-conductive Via Fill |
N-CVF |
N-CVF |
N-CVF |
| Sequential Lamination |
Yes |
Yes |
Yes |
| Impedance Control |
Inner |
±10% |
±8% |
±5% |
| Outer |
±10% |
±10% |
±7% |
| Surface Finish |
E-less Nickel Immersion Gold |
Ni 3~8㎛ |
| Flash |
Au 0.03~0.07㎛ |
| Heavy |
Au 0.1~0.7㎛ |
| Electrolytic Nickel Hard Gold |
Ni 3~15㎛ |
| (Selective Gold) |
Au 0.1~1.5㎛ |
| HASL |
3~25㎛ |
